I. Field
The present disclosure generally relates to memory arrays, and more particularly, to methods and devices including at least one memory bus.
II. Description of Related Art
In general, memory devices may include multiple banks of memory arrays. To access data stored in one of the multiple memory banks, a selected memory bank may be activated to provide a data signal to a multiplexer, which may be a static or a dynamic multiplexer. Each memory bank may provide one or more outputs to the multiplexer. A control device may provide a control signal to the multiplexer to select an output of the selected memory bank. However, if the multiplexer is a static multiplexer, then transistor gate loading for the selected line of each memory array is increased. If the multiplexer is a dynamic multiplexer, the multiplexer may increase clock loading.
In conventional devices, testing an output bus of a memory bank may add timing delays or undesired power consumption. Moreover, adding automatic test pattern generation data to the output bus of a particular memory bank of a multi-bank memory device may add complexity. Hence, there is a need for an improved memory bus output driver.